The disclosure relates to a semiconductor device that transfers data between a plurality of bus masters and a plurality of bus slaves through a bus, and particularly to a technique to arbitrate access through the bus.
A technique in which a plurality of bus masters and a plurality of bus slaves are coupled to each other through a bus and access from each bus master to each bus slave is controlled has been studied from the past. For example, in a semiconductor device such as a microcomputer, processors that are the bus masters and built-in memories that are the bus slaves are coupled to the bus, and an arbiter such as an address arbiter is provided. In the case where the bus masters compete with each other when accessing the bus in a transaction between the bus masters and the bus slaves, the arbiter arbitrates the bus masters accessing the bus slaves through the bus in accordance with the priority of each bus master. Further, the semiconductor device independently includes an address bus and a data bus, and can transfer data. In addition, the processing efficiency is improved by executing a command in an out-of-order process.
Various techniques to arbitrate data transfer between the bus masters and the bus slaves through the bus using the arbiter have been studied. For example, Japanese Unexamined Patent Application Publication No. 2006-331426 describes a technique in which a master logical unit and a slave logical unit are combined with each other to execute a transaction. According to the technique described in Japanese Unexamined Patent Application Publication No. 2006-331426, a mutual connection block includes arbiters such as an address arbiter and a read data arbiter, and arbitrates data transfer between a plurality of bus masters and a plurality of bus slaves in accordance with an arbitration policy. For example, according to the technique described in Japanese Unexamined Patent Application Publication No. 2006-331426, the address arbiter accepts a request of accessing a bus slave from a bus master having high priority.